Serial scan chain circuits are electronic circuits that are used mostly for integrated circuit or circuit board diagnostics, troubleshooting, functionality testing, or like applications. A serial scan chain circuit accepts as an input a fixed number of serial data bits and stores this serial data into a shift register or a like alterable memory. The serial data that is stored in the serial scan chain circuit is then used internally by the integrated circuit to initiate and test certain predetermined features or functions of the integrated circuit.
One method used to implement a serial scan chain circuit is to have N serial scan chain circuit shift registers each with M bits of storage. N and M are integer values. The N serial scan chain circuit shift registers are connected in series, meaning that the first bit of shift register P (where 1&lt;P&lt;N+1) is connected to the last bit M of the previous shift register, which is the (P-1).sup.th shift register. The first shift register in the chain is connected to a serial data input and the M.sup.th bit of the N.sup.th shift register is connected to a serial output line. This method of serial scan chaining is not flexible. In order to write serially to one scan chain shift register, all scan chains shift registers change value due to the serially connected architecture.
In order to allow for the use of a predetermined one of a plurality of serial scan chain circuit shift registers without the serial inter-dependence described above, a parallel method may be used. The parallel method has N serial scan chain circuit shift registers, each having a separate input and output with each input connected together and each output connected together. Therefore, the serial scan chain circuit shift registers are not connected in series and operate independent from one another due to the fact that each shift register can be altered without altering another shift register. A address in parallel bit form is used to select which serial scan chain circuit shift register is enabled to accept serial data. The address requires M bits for every 2.sup.M shift registers in the serial scan chain circuit. Therefore, several conductors need to be routed for the address bus in addition to serial data lines and control lines. The resulting overhead is significant.